Streaming implementation of video algorithms on a low-power parallel architecture

Low-power real-time streaming implementation of many video algorithms is possible using many-core-processor integrated circuit platforms, such as the Coherent Logix hx3100^TM processor based on HyperX technology, by structuring the algorithm as a data flow implementation so as to make full use of the inherent parallelism of the architecture. This is illustrated using a 2-D discrete wavelet transform for an image-fusion application. Calculations for different frame sizes are given to show scalability.