DocumentCode :
3254952
Title :
Modeling the Impact of Process Variation on Critical Charge Distribution
Author :
Ding, Qian ; Luo, Rong ; Wang, Hui ; Yang, Huazhong ; Xie, Yuan
Author_Institution :
Dept. of Electron. Eng., Tsinghua Univ., Beijing
fYear :
2006
fDate :
24-27 Sept. 2006
Firstpage :
243
Lastpage :
246
Abstract :
In this paper, we investigate the impact of process variation on soft error vulnerability with Monte Carlo analysis. Our simulation results show that Qcritical variation (3sigma/mean) of four types of storage circuits caused by process variation can be as large as 13.6%. We also propose an empirical model to estimate the Qcritical variation caused by gate length and threshold voltage variations. Simulation results show that this simple model is very accurate. Based on this model, the dependence of Qcritical variation on gate length variation, threshold voltage variation, and correlation between gate lengths is studied, using 70 nm SRAM as benchmark circuit.
Keywords :
Monte Carlo methods; SRAM chips; semiconductor process modelling; Monte Carlo analysis; SRAM; benchmark circuit; critical charge distribution; empirical model; gate length variations; process variation impact; soft error vulnerability; storage circuits; threshold voltage variations; Circuit simulation; Computational modeling; Computer errors; Computer science; Error analysis; Monte Carlo methods; Neutrons; Random access memory; Threshold voltage; Timing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SOC Conference, 2006 IEEE International
Conference_Location :
Taipei
Print_ISBN :
0-7803-9781-9
Electronic_ISBN :
0-7803-9782-7
Type :
conf
DOI :
10.1109/SOCC.2006.283890
Filename :
4063059
Link To Document :
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