Title :
A comparison of less flexibility first principles with simulated annealing
Author :
Wei, Shaojun ; Dong, Sheqin ; Hong, Xianlong ; Wu, Youliang
Author_Institution :
Graduate Sch., Tsinghua Univ., Shenzhen
Abstract :
VLSI module packing problem has been well studied for many years. Most of the researches in this field focused on topological representations that could be evaluated under the well-known simulated annealing (SA) framework. In 2001, a novel approach called the less flexibility first algorithm was proposed and proved to be both effective and efficient. However, as technology advances, the floorplanning problem is becoming more complicated and both the SA-based and LFF-based approaches are facing new challenges. In this paper, by analyzing the properties of each algorithm and the gaps in experiment results, we show that LFF is capable of generating area optimal results in shorter time in outline-free floorplanning and getting higher success rate in fixed-outline floorplanning, while SA is capable of generating results with better wire length. We also believe that an integration of LFF with SA is feasible to further improve the solution quality
Keywords :
integrated circuit layout; simulated annealing; very high speed integrated circuits; VLSI module packing problem; fixed-outline floorplanning; floorplanning problem; less flexibility first algorithm; outline-free floorplanning; simulated annealing; Algorithm design and analysis; Circuit simulation; Computational modeling; Computer science; Computer simulation; Integrated circuit interconnections; Runtime; Simulated annealing; Very large scale integration; Wire;
Conference_Titel :
Circuits and Systems, 2005. 48th Midwest Symposium on
Conference_Location :
Covington, KY
Print_ISBN :
0-7803-9197-7
DOI :
10.1109/MWSCAS.2005.1594333