Pixel scale optical sample and hold circuit integrated with multitechnology FPGA

A pixel scale optical sample and hold circuit has been developed with the capability to be integrated in multitechnology FPGA (MT-FPGA), which opens a new era for multitechnology applications to use flexibility, rapid prototyping and reusability benefits associated with conventional FPGAs. Various multitechnology devices ranging from photonic information processing systems, optical communication systems to MEMS devices can be implemented using MT-FPGA with the benefits to reprogram and reconfigure. The logic part of any multitechnology system can be implemented in the programmable block and multitechnology components can be incorporated from different multitechnology blocks available in the library. This paper describes the incorporation of a multitechnology block (MTB) in the new MT-FPGA architecture to underline the multitechnology field programmable ability of this architecture. The MTB is designed for implementation using 0.25 deep submicron technologies and consists of a p-diffusion to n-well photodetector followed by a sampling circuit and a buffer amplifier. The sampling rate of the MTB can be adjusted for different range of optical powers level thus giving the facility to represent wide range of optical power within the 2.5V range.