A self-restored current-mode CMOS multiple-valued logic design architecture

Author

Teng, Daniel H Y ; Bolton, R.J.

Author_Institution

Dept. of Electr. Eng., Saskatchewan Univ., Saskatoon, Sask., Canada

fYear

1999

fDate

1999

Firstpage

436

Lastpage

439

Abstract

This paper discusses a self-restored architecture for current-mode CMOS multiple-valued logic (MVL) design. The self-restored architecture is characterized by using both current-mode MVL circuits and voltage-mode binary circuits to implement MVL functions and to restore output signals simultaneously. Binary gates are used within the design architecture so that MVL-binary or binary-MVL conversion circuits are not required to interface with binary circuits. The average size of the resulting circuits is smaller than those using standard MVL operators

Keywords

CMOS logic circuits; current-mode logic; integrated circuit design; logic CAD; multivalued logic circuits; CMOS multiple-valued logic design architecture; MVL functions; current-mode MVL circuits; design architecture; output signals; self-restored current-mode architecture; voltage-mode binary circuits; CMOS logic circuits; Circuit noise; Circuit synthesis; Logic circuits; Logic design; Signal design; Signal restoration; Signal synthesis; Switches; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Communications, Computers and Signal Processing, 1999 IEEE Pacific Rim Conference on

Conference_Location

Victoria, BC

Print_ISBN

0-7803-5582-2

Type

conf

DOI

10.1109/PACRIM.1999.799569

Filename

799569