DocumentCode
3255509
Title
Avalanche-induced thermal instability in Ldmos transistors
Author
Hower, P. ; Tsai, C.Y. ; Merchant, S. ; Efland, T. ; Pendharkar, S. ; Steinhoff, R. ; Brodsky, J.
Author_Institution
Texas Instrum., Merrimack, NH, USA
fYear
2001
fDate
2001
Firstpage
153
Lastpage
156
Abstract
Safe operating area limits for large Ldmos are shown to be due to a thermal instability mechanism initiated by avalanche generated carriers which turn-on the parasitic bipolar transistor. An analytic model is described and is shown to agree well with experimental data
Keywords
MOSFET; avalanche breakdown; semiconductor device models; thermal stability; LDMOS transistor; analytical model; avalanche generation; parasitic bipolar transistor; safe operating area; thermal instability; Bipolar transistors; Electric resistance; Instruments; Predictive models; Resistance heating; Semiconductor optical amplifiers; Surface resistance; Thermal conductivity; Thermal resistance; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Power Semiconductor Devices and ICs, 2001. ISPSD '01. Proceedings of the 13th International Symposium on
Conference_Location
Osaka
ISSN
1063-6854
Print_ISBN
4-88686-056-7
Type
conf
DOI
10.1109/ISPSD.2001.934578
Filename
934578
Link To Document