DocumentCode :
3256032
Title :
Hardware efficient FIR compensation filter for delta sigma modulator analog to digital converters
Author :
Ren, Saiyu ; Siferd, Ray ; Blumgold, Robert ; Ewing, Robert
Author_Institution :
Dept. of Electr. Eng., Wright State Univ., Dayton, OH
fYear :
2005
fDate :
7-10 Aug. 2005
Firstpage :
1514
Abstract :
A design procedure is presented for a hardware efficient FIR compensation filter as a component in a delta sigma modulator analog to digital converter using cascaded sine low pass filters. The combination of the sine low pass filters and the hardware efficient FIR compensation filter results in a 21% saving in hardware (chip area) compared to a single FIR low pass filter
Keywords :
FIR filters; analogue-digital conversion; delta-sigma modulation; low-pass filters; FIR compensation filter; analog to digital converters; cascaded sine low pass filters; delta sigma modulator; Analog-digital conversion; Delta-sigma modulation; Digital filters; Finite impulse response filter; Frequency; Hardware; Low pass filters; Quantization; Sampling methods; Signal to noise ratio;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2005. 48th Midwest Symposium on
Conference_Location :
Covington, KY
Print_ISBN :
0-7803-9197-7
Type :
conf
DOI :
10.1109/MWSCAS.2005.1594401
Filename :
1594401
Link To Document :
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