Title :
Charge model for SOI LDMOST with lateral doping gradient
Author :
D´Halleweyn, N.V. ; Tiemeijer, L.F. ; Benson, J. ; Redman-White, W.
Author_Institution :
Dept. of Electron. & Comput. Sci., Southampton Univ., UK
Abstract :
In this paper we present a compact physically based charge model, which describes accurately the unique features of the SOI LDMOS. The model uses a modified Ward and Dutton partitioning scheme to account for the lateral doping gradient in the channel region and the overlap of the front gate over the drift region. The model has been implemented in SPICE3f5 and capacitance measurements are shown to agree well with the simulations
Keywords :
SPICE; capacitance; doping profiles; power MOSFET; semiconductor device models; silicon-on-insulator; SOI LDMOST; SPICE3f5; capacitance measurements; channel region; drift region; front gate overlap; lateral doping gradient; modified Ward Dutton partitioning scheme; physically based charge model; simulations; Capacitance measurement; Circuit simulation; Circuit topology; Convergence; Doping; Fabrication; Isolation technology; Laboratories; Low voltage; Semiconductor process modeling;
Conference_Titel :
Power Semiconductor Devices and ICs, 2001. ISPSD '01. Proceedings of the 13th International Symposium on
Conference_Location :
Osaka
Print_ISBN :
4-88686-056-7
DOI :
10.1109/ISPSD.2001.934612
