DocumentCode :
3256932
Title :
Cost-effective integration of an FN-programmed embedded flash memory into a 0.25 μm RF-BiCMOS technology
Author :
Fox, A. ; Ehwald, K.E. ; Schley, P. ; Barth, R. ; Marschmeyer, S. ; Wolf, C. ; Stikanov, V.E. ; Gromovyy, A. ; Hudyryev, A.
Author_Institution :
IHP Microelectron., Frankfurt, Germany
fYear :
2004
fDate :
6-8 Dec. 2004
Firstpage :
463
Lastpage :
466
Abstract :
This paper presents a process technology for cost-effective integration of low-power flash-memories into a 0.25 μm, high performance RF-BiCMOS process. Only 4 additional lithographic mask steps are used on top of the baseline BiCMOS process, leading to an in total 23 mask-level embedded flash BiCMOS process. Fowler-Nordheim-programmed stacked-gate and split-gate cells, suitable for medium density (Mbit) memories with programming times in the μs-range and an endurance of >105 cycles are demonstrated. Peripheral high-voltage transistors with >10 V breakdown voltage are integrated without additional mask steps on top of the flash cell integration.
Keywords :
BiCMOS memory circuits; flash memories; lithography; low-power electronics; masks; radiofrequency integrated circuits; semiconductor device breakdown; 0.25 micron; 10 V; FN programmed embedded flash memory; Fowler-Nordheim programming; RF BiCMOS technology; breakdown voltage; low power flash memory; mask level embedded flash BiCMOS process; medium density memory; peripheral high voltage transistors; stacked gate transistor cells; BiCMOS integrated circuits; Breakdown voltage; Earth; Energy consumption; Flash memory; Heterojunction bipolar transistors; MOS devices; Microelectronics; Nonvolatile memory; Writing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronics, 2004. ICM 2004 Proceedings. The 16th International Conference on
Print_ISBN :
0-7803-8656-6
Type :
conf
DOI :
10.1109/ICM.2004.1434699
Filename :
1434699
Link To Document :
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