Title :
Dual Basis Code Design For A Fault-tolerant, Multi-bit Correcting Bus Interface Chip
Author :
Redinbo, G. Robert ; Napolitano, Leonard M., Jr. ; Andaleon, David D.
Author_Institution :
University of California
Keywords :
Computer errors; Costs; Error correction; Error correction codes; Fault tolerance; Galois fields; Logic design; Programmable logic arrays; Protection; Reed-Solomon codes;
Conference_Titel :
Information Theory, 1991 (papers in summary form only received), Proceedings. 1991 IEEE International Symposium on (Cat. No.91CH3003-1)
Print_ISBN :
0-7803-0056-4
DOI :
10.1109/ISIT.1991.695403
