A low-power adiabatic register file with two types of energy-efficient line drivers

This paper presents a novel low-power register file that is realized entirely based on adiabatic logic. The register file consists of a storage-cell array, address decoders, read/write control circuits, sense amplifiers, and read/write drivers. Two types of energy-efficient line drivers, which haven´t nonadiabatic energy loss on output loads, are used to recover the energy of large capacitances in adiabatic manner. The bit-lines and word-lines are driven by the N-type dual transmission gate adiabatic logic (N-DTGAL). A P-type dual transmission gate adiabatic logic (P-DTGAL) that is complementary to the N-DTGAL is proposed. The storage-cells are powered by the outputs of P-DTGAL circuits instead of a DC supply. SPICE simulation indicate that the proposed register file achieve considerable energy savings over similar implementation