DocumentCode
3257102
Title
A new leakage-tolerant design for high fan-in domino circuits
Author
Moradi, Farshad ; Peiravi, Ali ; Mahmoodi, Hamid
Author_Institution
Dept. of Electr. Eng., Ferdowsi Univ. of Mashhad, Iran
fYear
2004
fDate
6-8 Dec. 2004
Firstpage
493
Lastpage
496
Abstract
In this paper, a new leakage-tolerant circuit design technique for high fan-in domino circuits is presented. This technique uses stacking effect to reduce the leakage of the evaluation network of domino gates. It also uses a current mirror in parallel with the evaluation network to reduce the evaluation delay. Depending on the fan-in, the proposed technique exhibits 2.0X to 17.7X leakage and noise tolerance improvement compared to a standard domino counterparts designed in a 70-nm technology node.
Keywords
circuit noise; current mirrors; fault tolerance; leakage currents; logic circuits; logic design; logic gates; network synthesis; 70 nm; current mirror; domino gates; evaluation network; high fan-in domino circuits; leakage tolerant circuit design; noise tolerance; stacking effect; Circuit noise; Crosstalk; Leakage current; Logic circuits; Logic design; Logic devices; Logic gates; Noise robustness; Stacking; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronics, 2004. ICM 2004 Proceedings. The 16th International Conference on
Print_ISBN
0-7803-8656-6
Type
conf
DOI
10.1109/ICM.2004.1434707
Filename
1434707
Link To Document