HLSIM-a new hierarchical logic simulator and netlist converter

HLSIM is a hierarchical logic simulator that can deal with nested models. HLSIM is intended to simulate large VLSI circuits, including chips. The authors discuss two aspects of the simulator, as an analog-to-digital netlist converter and as a new digital simulator. As a converter, it takes a hierarchical analog ASTAP netlist and supplementary files for the leaf models and creates a digital model of the VLSI circuit. The simulator is discussed in terms of use and features, including how special cases such as emitter and collector dots and differential pairs are handled. Various examples of simulations are given