Title :
An auxiliary zero state synthesizer to reduce common mode voltage in three-phase inverters
Author :
Manjrekar, Madhav D. ; Lip, Thomas A.
Author_Institution :
Dept. of Electr. & Comput. Eng., Wisconsin Univ., Madison, WI, USA
Abstract :
The common mode voltage produced by the modulation of three-phase power inverters creates a significant amount of common mode conducted current in motor drives. As an alternative to inserting a large common mode choke to attenuate this common mode current, a modification to the inverter topology and the modulation strategy is proposed that can eliminate zero state components in the common mode voltage produced by the inverter. With the proposed modification, it is observed that the inverter generates substantially low common mode voltage, thereby resulting in the reduction of common mode current by several orders of magnitude. The topological structure, operating principles and performance characteristics are presented. A comparative evaluation of various alternatives studied in the literature to mitigate electromagnetic interference is also presented in the paper
Keywords :
DC-AC power convertors; PWM invertors; electromagnetic interference; auxiliary zero state synthesizer; common mode conducted current; common mode voltage reduction; electromagnetic interference mitigation; inverter topology modification; modulation strategy; motor drives; operating principles; performance characteristics; three-phase inverters; topological structure; Conductors; Couplings; Electromagnetic interference; Frequency; Impedance; Motor drives; Pulse width modulation; Pulse width modulation inverters; Synthesizers; Voltage;
Conference_Titel :
Industry Applications Conference, 1999. Thirty-Fourth IAS Annual Meeting. Conference Record of the 1999 IEEE
Conference_Location :
Phoenix, AZ
Print_ISBN :
0-7803-5589-X
DOI :
10.1109/IAS.1999.799924