Title :
UHC-a massively parallel and distributed realisation of hierarchical classifier networks
Author_Institution :
Dept. of Comput. Sci., Keele Univ., UK
Abstract :
In an earlier work on the design of fine-grain, scalable classifiers for massively parallel computers, the technique of unifying cascaded networks has been demonstrated. This paper further examines the method adopted using a highly parallel processing architecture, entitled Unified Hierarchical Classifiers (UHC), based on the principles of Generalised Regression Neural Networks (GRNN). As with the GRNN it has been shown that the resulting classification network can be implemented efficiently on general-purpose multiprocessor platforms without dedicated hardware for processor interconnections. Adding to this the structural simplicity, and the demonstrable potential for an effective distributed realisation on the Cray T3R, will make UHC an attractive classifier architecture in practical applications
Keywords :
neural net architecture; parallel architectures; Generalised Regression Neural Networks; UHC; Unified Hierarchical Classifiers; cascaded networks; classification network; distributed realisation; fine-grain; hierarchical classifier networks; massively parallel; massively parallel computers; parallel processing architecture; scalable classifiers; Computer architecture; Computer networks; Computer science; Concurrent computing; Kernel; Neural network hardware; Neural networks; Parallel processing; Performance analysis; Real time systems;
Conference_Titel :
Parallel Architectures, Algorithms, and Networks, 1997. (I-SPAN '97) Proceedings., Third International Symposium on
Conference_Location :
Taipei
Print_ISBN :
0-8186-8259-6
DOI :
10.1109/ISPAN.1997.645091