An efficient instruction compression/decompression system based on field partitioning

An efficient instruction compression/decompression system for ARM series architecture is proposed. Due to a high degree of repetition in the encoding of the instructions in a program, we could get a statistics of the appearances of each field in all instructions of a program. Depending on a statistics, we partition each instruction into four fields and compress each field using Huffman coding method. Experimental results show that our method is better than others with a 55% of average compression ratio. For decompression, single buffering, double buffering and pipeline techniques have been proposed. Without delay due to the decompressing time and jump penalty, a new pipeline with back-up for flushing technique is proposed. To implement the method with less cost, a basic block based compression method is applied. Though the compression ratio has some sacrifices (58% in average), the execution delay can be decreased to a zero.