Title :
Edge-valued binary decision for multi-level hierarchical verification
Author :
Lai, Yung-Te ; Sastry, Sarma
Author_Institution :
Dept. of Electr. Eng.-Syst., Univ. of Southern California, Los Angeles, CA, USA
Abstract :
The authors present a new data structure called edge-valued binary decision diagrams (EVs) as a representation of functions. An EV is an extension of ordered binary decision diagrams that allows for multilevel and hierarchical verification. It is shown that an EV is a compact and canonical representation for arbitrary integer functions. Hence, the specification can be at a higher level than the implementation. The variable ordering strategy for an EV can be derived from a higher-level functional specification instead of the gate-level specification. Examples of the design of a 64-b comparator and of a 64-b ripple-carry adder are included
Keywords :
data structures; formal verification; logic testing; EVs; binary decision diagrams; edge-valued binary decision diagrams; functional specification; multi-level hierarchical verification; variable ordering strategy; verification; Adders; Arithmetic; Boolean functions; Circuits; Data structures; Input variables; Logic; Network synthesis;
Conference_Titel :
Design Automation Conference, 1992. Proceedings., 29th ACM/IEEE
Conference_Location :
Anaheim, CA
Print_ISBN :
0-8186-2822-7
DOI :
10.1109/DAC.1992.227813