• DocumentCode
    3258069
  • Title

    An efficient fractional motion estimation architecture for avs real-time full Hd video encoder

  • Author

    Wang, Fei ; Li, Yuan ; Jia, Huizhu ; Xie, Xiaodong ; Gao, Wen

  • Author_Institution
    Nat. Eng. Lab. for Video Technol., Peking Univ., Beijing, China
  • fYear
    2012
  • fDate
    16-17 July 2012
  • Firstpage
    279
  • Lastpage
    284
  • Abstract
    Fractional motion estimation (FME) as a complement to integer motion estimation (IME) conducts higher compression rate in video coding. Based on multiple reference frames and all modes of variable-block-size (VBS) motion search, the common FME algorithm and architecture generally causes high computational complexity. It consumes plenty of time and hardware resources to process the real-time (30fps) high definition (HD) video compression. In this paper, we propose an efficient FME algorithm and architecture that significantly reduce the number of the candidate sub-pixels by predicting quarter motion vector and cost less hardware by saltatory interpolation. Compared with the conventional FME architecture, the proposed method reduces resources significantly and accelerates the processing speed. 75% circuit area and 68% computational complexity are saved with only 0.1dB drop in performance and similar bit rate saving on average. Experiments of various sequences show that HD video (1920×1080) can be processed in real-time at frequency of 100MHz and it is verified in an AVS HD encoder on a Xilinx Virtex-6 FPGA prototype system.
  • Keywords
    field programmable gate arrays; interpolation; motion estimation; video coding; AVS HD encoder; FME; HD video compression; IME; VBS motion search; Xilinx Virtex-6 FPGA prototype system; compression rate; fractional motion estimation architecture; frequency 100 MHz; high definition video compression; integer motion estimation; quarter motion vector; real-time full HD video encoder; saltatory interpolation; variable-block-size; video coding; Algorithm design and analysis; Computer architecture; High definition video; Interpolation; Partitioning algorithms; Pipelines; Real time systems; AVS; FME; HD; Real-time;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Imaging Systems and Techniques (IST), 2012 IEEE International Conference on
  • Conference_Location
    Manchester
  • Print_ISBN
    978-1-4577-1776-5
  • Type

    conf

  • DOI
    10.1109/IST.2012.6295494
  • Filename
    6295494