DocumentCode
3258340
Title
FPGA Implementations of Cellular Automata for Pseudo-Random Number Generation
Author
Anghelescu, Petre ; Sofron, Emil ; Ionita, Silviu ; Ionescu, Laurentiu
Author_Institution
Dept. of Electron. & Comput., Pitesti Univ., Arges
Volume
2
fYear
2006
fDate
27-29 Sept. 2006
Firstpage
371
Lastpage
374
Abstract
This paper present a hardware implementation in a FPGA circuit of an efficient pseudo-random number generator based on cellular automata. We demonstrate in this paper how microscopic (local) interactions influence the overall macroscopic (global) behavior of the whole system. We highlight the possibility to build the evolutionary systems on such a simple mathematical model as a cellular automata space by introducing the rules of evolution of individuals, their interaction, and their robustness to variations of the model. A regular, modular, and cascadable hardware implementation of the generator has been implemented, which is efficient in terms of VLSI technology. The design has been specified in VHDL targeted on a XC3S400 based FPGA and verified for functional correctness by software simulation
Keywords
cellular automata; field programmable gate arrays; hardware description languages; random number generation; FPGA implementations; VHDL; VLSI technology; XC3S400; cascadable hardware implementation; cellular automata; pseudo-random number generation; software simulation; Automata; Automatic testing; Built-in self-test; Circuits; Field programmable gate arrays; Hardware; Mathematical model; Microscopy; Random number generation; Very large scale integration; BIST; Cellular Automata; FPGA;
fLanguage
English
Publisher
ieee
Conference_Titel
International Semiconductor Conference, 2006
Conference_Location
Sinaia
Print_ISBN
1-4244-0109-7
Type
conf
DOI
10.1109/SMICND.2006.284022
Filename
4063250
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