Title :
Advanced CAD tools for ASIC testing
Author_Institution :
LSI Logic Corp., Milpitas, CA, USA
Abstract :
The author describes a set of CAD tools for supporting the testing of application-specific integrated circuits (ASICs) designed with a scan-path technique. The tool set includes a project-specific design-rule checker, a scan designer generator, and a hardware-accelerated automatic test-pattern generation program. The tool set contains the following unique features: it supports a generalized scan-path design methodology; it makes it easy for a novice designer to do a scan design; and it generates test patterns which detect faults closely related to the failure in silicon
Keywords :
application specific integrated circuits; circuit CAD; integrated circuit testing; ASIC testing; CAD tools; hardware-accelerated automatic test-pattern generation program; project-specific design-rule checker; scan designer generator; scan-path technique; Application specific integrated circuits; Automatic testing; Circuit faults; Circuit testing; Design automation; Design methodology; Fault detection; Integrated circuit testing; Silicon; Test pattern generators;
Conference_Titel :
CompEuro '89., 'VLSI and Computer Peripherals. VLSI and Microelectronic Applications in Intelligent Peripherals and their Interconnection Networks', Proceedings.
Conference_Location :
Hamburg
Print_ISBN :
0-8186-1940-6
DOI :
10.1109/CMPEUR.1989.93473
