• DocumentCode
    3258505
  • Title

    A performance driven macro-cell placement algorithm

  • Author

    Gao, Tong ; Vaidya, P.M. ; Liu, C.L.

  • Author_Institution
    Dept. of Comput. Sci., Illinois Univ., Urbana, IL, USA
  • fYear
    1992
  • fDate
    8-12 Jun 1992
  • Firstpage
    147
  • Lastpage
    152
  • Abstract
    The authors present a new performance driven macro-cell placement algorithm. Placement of modules is guided by a set of upper- and lower-bounds on the net wire lengths. A convex programming algorithm is used to compute a set of upper-bounds on the net wire lengths which will ensure that timing requirements between input and output signals are satisfied. A set of lower-bounds is also computed to control signal skews at intermediate points of the circuit. Artificial nets are introduced between all pairs of modules. Lower-bounds on the lengths of the artificial nets are computed to avoid module overlaps in the placement. A modified min-cut placement algorithm is then used to generate a placement that satisfies the upper- and lower-bounds. An iterative procedure is used to modify the set of upper- and lower-bounds to improve the quality of the placement result. Experimental results on eight test examples are included
  • Keywords
    circuit layout CAD; convex programming; artificial nets; convex programming; lower-bounds; min-cut placement algorithm; performance driven macro-cell placement algorithm; upper bounds; Circuit optimization; Delay effects; Integrated circuit interconnections; Iterative algorithms; Iterative methods; Pins; Timing; Very large scale integration; Wire;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 1992. Proceedings., 29th ACM/IEEE
  • Conference_Location
    Anaheim, CA
  • ISSN
    0738-100X
  • Print_ISBN
    0-8186-2822-7
  • Type

    conf

  • DOI
    10.1109/DAC.1992.227845
  • Filename
    227845