DocumentCode
3258691
Title
AWESpice: a general tool for the accurate and efficient simulation of interconnect problems
Author
Raghavan, Vivek ; Bracken, J. Eric ; Rohrer, Ronald A.
Author_Institution
Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
fYear
1992
fDate
8-12 Jun 1992
Firstpage
87
Lastpage
92
Abstract
AWESpice is a tool for the efficient and accurate simulation of circuits dominated by interconnect. It accepts a general nonlinear circuit and uses the asymptotic waveform evaluation (AWE) algorithm to efficiently convert its linear interconnect portion into multiport admittance macromodels. The macromodels are then simulated in conjunction with the nonlinear devices using a modified version of the SPICE algorithm. This technique leads to a significant reduction in CPU time while retaining the benefits of a conventional circuit simulator. Some examples that have been run to show the accuracy and efficiency of AWESpice on a variety of interconnect problems are presented
Keywords
circuit analysis computing; nonlinear network analysis; AWESpice; SPICE algorithm; asymptotic waveform evaluation; general nonlinear circuit; general tool; interconnect problems; multiport admittance macromodels; simulation; Circuit simulation; Circuit topology; Computational modeling; Coupling circuits; Delay systems; Distributed parameter circuits; Integrated circuit interconnections; Integrated circuit packaging; Printed circuits; Propagation losses;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 1992. Proceedings., 29th ACM/IEEE
Conference_Location
Anaheim, CA
ISSN
0738-100X
Print_ISBN
0-8186-2822-7
Type
conf
DOI
10.1109/DAC.1992.227856
Filename
227856
Link To Document