DocumentCode :
3258741
Title :
Phase synthesis using coupled PLLs
Author :
Iyer, S. P Anand ; Oliaei, Omid
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Massachusetts, Amherst, MA
fYear :
2007
fDate :
5-8 Aug. 2007
Firstpage :
457
Lastpage :
460
Abstract :
We present the detailed design and measurement results for a phase synthesizer using coupled phase locked loops (PLLs) suitable for analog beam forming. It is shown that this architecture achieves a phase shift of plusmn180deg, which is a significant improvement over conventional coupled-PLLs which are limited to plusmn90deg. A two-PLL system has been implemented using off the shelf components. The system synchronizes at 25 MHz and generates a steady-state phase difference in the range plusmn180deg using an adjustable DC control current.
Keywords :
phase locked loops; analog beam forming; coupled phase locked loop; frequency 25 MHz; phase synthesizer; Array signal processing; Equations; Injection-locked oscillators; Phase detection; Phase frequency detector; Phase locked loops; Phase noise; Phased arrays; Steady-state; Voltage-controlled oscillators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2007. NEWCAS 2007. IEEE Northeast Workshop on
Conference_Location :
Montreal, Que
Print_ISBN :
978-1-4244-1163-4
Electronic_ISBN :
978-1-4244-1164-1
Type :
conf
DOI :
10.1109/NEWCAS.2007.4487966
Filename :
4487966
Link To Document :
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