FPGA Emulation environment of different digital carrier synchronizers

Digital communication systems such as MODEM (modulation-demodulation) and M-PSK require the application of carrier synchronization in phase and frequency. The key role of this DCS depends largely on the numerically controlled oscillator (NCO) and the loop filter (LF). There are numerous configurations to realize NCOs and LFs that are employed and emulated in the architectural model of DCS. Field programmable gate arrays (FPGAs) are well established as the standard to implement digital communication systems, due to the speed, performance, reliability and flexibility. We propose a synthesizable and portable FPGA emulation environment of a digital carrier synchronizer (DCS), which is a phase-locked loop (PLL) [1], realized using digital circuits.