DocumentCode :
3258866
Title :
On the performance of double-gate MOSFET circuit applications
Author :
Hassoune, Ilham ; O´Connor, Ian ; Navarro, David
Author_Institution :
Lyon Inst. of Nanotechnol., Ecole Centrale de Lyon, Ecully
fYear :
2007
fDate :
5-8 Aug. 2007
Firstpage :
558
Lastpage :
561
Abstract :
In this paper, we carry out a quantitative analysis of the performance of Double-Gate (DG) MOSFET circuit applications through various benchmark structures (NAND cell, ring oscillator and voltage controlled oscillator). Simulation results in double-gate fully depleted SOI/CMOS technology of the considered benchmarks under Vdd=1.2 V have shown that design with connected gates outperforms design with independent gate control with regard to speed and die area, while design with independent gate control is more appropriate for managing both dynamic and static power.
Keywords :
MOSFET; MOSFET circuits; silicon-on-insulator; CMOS technology; SOI; double-gate MOSFET circuit; independent gate control; CMOS technology; Circuit simulation; Energy management; MOSFET circuits; Nanotechnology; Parasitic capacitance; Performance analysis; Ring oscillators; Threshold voltage; Voltage-controlled oscillators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2007. NEWCAS 2007. IEEE Northeast Workshop on
Conference_Location :
Montreal, Que
Print_ISBN :
978-1-4244-1163-4
Electronic_ISBN :
978-1-4244-1164-1
Type :
conf
DOI :
10.1109/NEWCAS.2007.4487973
Filename :
4487973
Link To Document :
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