DocumentCode
3258889
Title
Electronic neural circuits with simulated annealing
Author
Lee, Bang W. ; Sheu, Bing J.
Author_Institution
Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA
fYear
1989
fDate
0-0 1989
Abstract
Summary form only given, as follows. A promising approach to implementing electronic neural networks is to design and fabricate special-purpose VLSI chips, because the software execution of simulated annealing on conventional computers is very slow. A hardware realization of simulated annealing is described using the analog between the temperature in the Boltzmann machine and the amplifier gain in the electronic neural circuits. Detailed requirements for the annealing schedule are analyzed. Experimental results on the transfer characteristics of 4-bit Hopfield neural-based analog-to-digital converters with the simulated annealing technique are presented.<>
Keywords
VLSI; analogue-digital conversion; neural nets; 4-bit Hopfield neural-based analog-to-digital converters; Boltzmann machine; VLSI chips; amplifier gain; electronic neural networks; hardware realization; simulated annealing; Analog-digital conversion; Neural networks; Very-large-scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Neural Networks, 1989. IJCNN., International Joint Conference on
Conference_Location
Washington, DC, USA
Type
conf
DOI
10.1109/IJCNN.1989.118457
Filename
118457
Link To Document