DocumentCode
3259089
Title
A deterministic approach to netlist display
Author
Shiran, Y.
Author_Institution
Silvar-Lisco, Menlo Park, CA
fYear
1989
fDate
8-12 May 1989
Firstpage
42521
Lastpage
12540
Abstract
The authors describe a totally deterministic approach and a recursive algorithm for generating device-level schematic diagrams, given only the netlist description of the circuit. The new algorithm is superior to previous tools in that (1) it is deterministic (others use heuristics and therefore cannot handle certain problems), (2) it is fast (others are up to 100 times slower), (3) it is technology-independent (others were written for CMOS only), and (4) it can be implemented in an extremely short program (around 1000 lines of C)
Keywords
circuit layout CAD; circuit layout CAD; deterministic approach; device-level schematic diagrams; netlist display; recursive algorithm; Analytical models; CMOS process; CMOS technology; Circuits; Displays; Graphics; Layout; Probes; Signal generators; Workstations;
fLanguage
English
Publisher
ieee
Conference_Titel
CompEuro '89., 'VLSI and Computer Peripherals. VLSI and Microelectronic Applications in Intelligent Peripherals and their Interconnection Networks', Proceedings.
Conference_Location
Hamburg
Print_ISBN
0-8186-1940-6
Type
conf
DOI
10.1109/CMPEUR.1989.93477
Filename
93477
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