DocumentCode :
3259375
Title :
Wall-stitching: yet another data-structuring technique for VLSI tools at both topological and geometric levels
Author :
Ying, C.S. ; Wong, J.S.L.
Author_Institution :
Dept. of Electron. Eng., Hong Kong Polytech., Hong Kong
fYear :
1989
fDate :
8-12 May 1989
Firstpage :
14732
Lastpage :
16193
Abstract :
A new data-structuring technique called wall-stitching is presented for rectangular floorplan representation. It leads to a simple and complete correspondence between the geometric position and topological relationship of rooms on the floorplan. Comparisons are made with corner-stitching, a well known data structuring technique. The algorithms are implemented for path search on a floorplan, and the related misalignment problem is investigated. The experimental results show that the wall-stitching technique helps to solve the misalignment problem in path search in most cases
Keywords :
VLSI; circuit layout CAD; data structures; VLSI tools; data-structuring technique; geometric levels; geometric position; rectangular floorplan representation; topological levels; wall-stitching; Circuits; Compaction; Data structures; Electrons; Floors; Graphics; Layout; Routing; Solid modeling; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
CompEuro '89., 'VLSI and Computer Peripherals. VLSI and Microelectronic Applications in Intelligent Peripherals and their Interconnection Networks', Proceedings.
Conference_Location :
Hamburg
Print_ISBN :
0-8186-1940-6
Type :
conf
DOI :
10.1109/CMPEUR.1989.93479
Filename :
93479
Link To Document :
بازگشت