Title :
Blocking-aware task assignment for wormhole routed network-on-chip
Author :
Bourduas, S. ; Chan, H. ; Zilic, Z.
Author_Institution :
Dept. of Electr. & Comput. Eng., McGill Univ., Montreal, QC
Abstract :
Wormhole routed mesh networks can suffer from blocking due to contention when multiple packets are routed along the same path. This paper presents a new method that accounts for blocking and assigns tasks to nodes in a way that tries to minimize contention and thus reduce the latencies introduced by blocking using simulated annealing. We have implemented a xy routed wormhole mesh in SystemC that enables us to evaluate the effectiveness of our methodology. Results show that our methodology is effective at reducing blocking costs and latencies when compared to minimizing communication distances only.
Keywords :
multiprocessor interconnection networks; network routing; network-on-chip; annealing; blocking-aware task assignment; wormhole routed mesh networks; wormhole routed network-on-chip; Cost function; Delay; Mesh networks; Network-on-a-chip; Real time systems; Routing; Simulated annealing; Switches; System-on-a-chip; Telecommunication traffic;
Conference_Titel :
Circuits and Systems, 2007. NEWCAS 2007. IEEE Northeast Workshop on
Conference_Location :
Montreal, Que
Print_ISBN :
978-1-4244-1163-4
Electronic_ISBN :
978-1-4244-1164-1
DOI :
10.1109/NEWCAS.2007.4488020