• DocumentCode
    3259905
  • Title

    Partitioned systolic multiplier for GF(2m)

  • Author

    Kim, Hyun-Sung ; Lee, Keon-Jik ; Kim, Jungjoon ; Yoo, Kee-Young

  • Author_Institution
    Dept. of Comput. Eng., Kyungpook Nat. Univ., Taegu, South Korea
  • fYear
    1999
  • fDate
    1999
  • Firstpage
    192
  • Lastpage
    197
  • Abstract
    This paper presents a partitioned systolic array with an arbitrary number of PEs for MSB-first approach multiplication in GF(2m) based on the polynomial representation. As compared to the related multipliers presented by Wang et al. the proposed partitioned systolic array requires significantly small number of basic cells. It requires only m/2 number of basic cells and has the same throughput rate as when it has 2 bands. The proposed systolic array architecture has an arbitrary number of PEs using the partitioning concept although it suffers a little loss of computation times
  • Keywords
    digital arithmetic; multiplying circuits; systolic arrays; GF(2m); MSB-first; partitioned systolic array; partitioning; systolic multiplier; Application software; Circuits; Communication system control; Computer architecture; Cryptography; Galois fields; Partitioning algorithms; Polynomials; Systolic arrays; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Parallel Processing, 1999. Proceedings. 1999 International Workshops on
  • Conference_Location
    Aizu-Wakamatsu
  • ISSN
    1530-2016
  • Print_ISBN
    0-7695-0353-5
  • Type

    conf

  • DOI
    10.1109/ICPPW.1999.800061
  • Filename
    800061