Communication Limits with Low Precision Analog-to-Digital Conversion at the Receiver

We examine the Shannon limits of communication systems when the precision of the analog-to-digital conversion (ADC) at the receiver is constrained. ADC is costly and power- hungry at high speeds, hence ADC precision is expected to be a limiting factor in the performance of receivers which are heavily based on digital signal processing. In this paper, we consider transmission over an ideal discrete-time real baseband additive white Gaussian noise (AWGN) channel, and provide capacity results when the receiver ADC employs a small number of bits, generalizing our prior work on one bit ADC. We show that dithered ADC does not increase capacity, and hence restrict attention to deterministic quantizers. To compute the capacity, we use a dual formulation of the channel capacity problem, which is attractive due to the discrete nature of the output alphabet. The numerical results we obtain strongly support our conjecture that the optimal input distribution is discrete, and has at most one mass point in each quantizer interval. This implies, for example, that it is not possible to support large alphabets such as 64-QAM using 2-bit quantization on the I and Q channels, at least with symbol rate sampling.