DocumentCode :
3260089
Title :
Optimal data reduction on reconfigurable tori
Author :
Zhou, Jipeng ; Lau, Francis C M
Author_Institution :
Dept. of Comput. Sci. & Inf. Syst., Hong Kong Univ., China
fYear :
2001
fDate :
2001
Firstpage :
249
Lastpage :
256
Abstract :
Data reduction is a fundamental operation of parallel computing. We derive lower bounds on communication latency for global data reduction and multiple global data reduction on reconfigurable tori. We present optimal global data reduction algorithms and multiple global data reduction algorithms on reconfigurable tori of any dimension. The formal reduction algorithms we give can make reduction and broadcast operations easy to implement
Keywords :
data reduction; multiprocessor interconnection networks; parallel architectures; reconfigurable architectures; broadcast operations; communication latency; formal reduction algorithms; global data reduction; lower bounds; multiple global data reduction; optimal data reduction; parallel computing; reconfigurable tori; Assembly; Broadcasting; Computer science; Concurrent computing; Delay; Information systems;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel and Distributed Systems, 2001. ICPADS 2001. Proceedings. Eighth International Conference on
Conference_Location :
Kyongju City
ISSN :
1521-9097
Print_ISBN :
0-7695-1153-8
Type :
conf
DOI :
10.1109/ICPADS.2001.934827
Filename :
934827
Link To Document :
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