A 476-gate-count dynamic optically reconfigurable gate array VLSI chip in a standard 0.35/spl mu/m CMOS technology

Author

Watanabe, Minoru ; Kobayashi, Fuminori

Author_Institution

Dept. of Syst. Innovation & Informatics, Kyushu Inst. of Technol., Fukuoka

fYear

2006

fDate

24-27 Jan. 2006

Abstract

This paper presented the design of the largest 476-gate count DORGA fabricated by using 0.35 mum three-metal CMOS technology. In the case of reconfiguring DORGA at 100MHz, the required optical power was estimated 2.24 W. At that time, the reconfiguration data transfer rate of the DORGA VLSI chip reaches 369.6 Gbit/s

Keywords

VLSI; integrated circuit design; logic arrays; optical logic; photodiodes; reconfigurable architectures; 0.35 micron; 100 MHz; 100 W; 369.6 Gbit/s; VLSI chip; dynamic optically reconfigurable gate array; photodiodes; three-metal CMOS technology; CMOS process; CMOS technology; Circuits; High speed optical techniques; Holographic optical components; Holography; Optical arrays; Optical buffering; Photodiodes; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation, 2006. Asia and South Pacific Conference on

Conference_Location

Yokohama

Print_ISBN

0-7803-9451-8

Type

conf

DOI

10.1109/ASPDAC.2006.1594660

Filename

1594660

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3260123