Title :
Improving workload balance and code optimization in processor-in-memory systems
Author :
Chu, Slo-Li ; Huang, Tsung-Chuan ; Lee, Lan-Chi
Author_Institution :
Dept. of Electr. Eng., Nat. Sun Yat-Sen Univ., Kaohsiung, Taiwan
Abstract :
PIM (Processor-In-Memory) architectures have been proposed in recent years. One major objective of PIM is to reduce the performance gap between the CPU and memory. To exploit the potential benefits of PIM, we designed a statement base parallelizing system-SAGE. In this paper, we extend this system to achieve better performance by devising several comprehensive optimizing techniques, which include IMOP (Intelligent Memory Operation) recognition, tiling for PIM, and a precise mechanism to get load-balanced execution schedule. The experimental results are also presented and discussed
Keywords :
parallel processing; performance evaluation; resource allocation; SAGE; code optimization; intelligent memory operation; load-balanced execution schedule; performance gap; processor-in-memory systems; statement base parallelizing system; workload balance; Complex networks; Computer architecture; Coprocessors; Costs; Delay; Hardware; Memory architecture; Processor scheduling; Program processors; Random access memory;
Conference_Titel :
Parallel and Distributed Systems, 2001. ICPADS 2001. Proceedings. Eighth International Conference on
Conference_Location :
Kyongju City
Print_ISBN :
0-7695-1153-8
DOI :
10.1109/ICPADS.2001.934830
