Title :
Designing a custom architecture for DCT using NISC technology
Author :
Gorjiara, Bita ; Reshadi, Mehrdad ; Gajski, Daniel
Author_Institution :
Center for Embedded Syst. Comput., California Univ., Irvine, CA
Abstract :
This paper presents design of a custom architecture for discrete cosine transform (DCT) using no-instruction-set computer (NISC) technology that is developed for fast processor customization. Using several software transformations and hardware customization, we achieved up to 10 times performance improvement, 2 times power reduction, 12.8 times energy reduction, and 3 times area reduction compared to an already-optimized soft-core MIPS implementation
Keywords :
discrete cosine transforms; hardware-software codesign; microprocessor chips; discrete cosine transform; hardware customization; no-instruction-set computer technology; processor customization; software transformations; Application specific processors; Automatic generation control; Clocks; Computer architecture; Decoding; Discrete cosine transforms; Embedded computing; Frequency; Hardware; Software performance;
Conference_Titel :
Design Automation, 2006. Asia and South Pacific Conference on
Conference_Location :
Yokohama
Print_ISBN :
0-7803-9451-8
DOI :
10.1109/ASPDAC.2006.1594664
