DocumentCode :
3260195
Title :
Simulation of fault injection of microprocessor system using VLSI architecture system
Author :
Sharma, Abhay ; Singh, Bhupendra
Author_Institution :
Dept. of ECE, Green Hills Eng. Coll., Solan, India
fYear :
2009
fDate :
23-26 Jan. 2009
Firstpage :
1
Lastpage :
5
Abstract :
Evaluating and possibly improving the fault tolerance and error detecting mechanisms is becoming a key issue when designing safety-critical electronic systems. The proposed approach is based on simulation-based fault injection and allows the analysis of the system behavior when faults occur. The paper describes how a microprocessor board employed in an automated light-metro control system has been modeled in VHDL and a Fault Injection Environment has been set up using a commercial simulator. Preliminary results about the effectiveness of the hardware fault-detection mechanisms are also reported. Such results will address the activity of experimental evaluation in subsequent phases of the validation process.
Keywords :
VLSI; fault tolerance; hardware description languages; microprocessor chips; VHDL; VLSI architecture system; automated light-metro control system; error detecting mechanisms; fault tolerance; microprocessor system; safety-critical electronic systems; simulation-based fault injection; Application software; Computational modeling; Computer errors; Computer simulation; Delay; Fault detection; Hardware; Microprocessors; Real time systems; Very large scale integration; Fault Injection; IP module; NEST; Simulation; VHDL;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
TENCON 2009 - 2009 IEEE Region 10 Conference
Conference_Location :
Singapore
Print_ISBN :
978-1-4244-4546-2
Electronic_ISBN :
978-1-4244-4547-9
Type :
conf
DOI :
10.1109/TENCON.2009.5396241
Filename :
5396241
Link To Document :
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