Title :
Ionizing dose hardness assurance methodology for qualification of a BiCMOS technology dedicated to high dose level applications
Author :
Flament, O. ; Musseau, O. ; Leray, J.L. ; Dutisseuil, E. ; Corbiere, T.
Author_Institution :
CEA, Bruyeres-Le-Chatel, France
Abstract :
This work concerns the development of a radiation hardness assurance methodology specially devoted to CMOS, JFET and bipolar transistors used in high total dose level environments. On the basis of recent studies, high temperature, high dose rate irradiations were performed. We propose a test procedure which combines high temperature irradiations and isochronal anneals for the qualification
Keywords :
BiCMOS integrated circuits; MOSFET; annealing; bipolar transistors; high-temperature electronics; integrated circuit testing; junction gate field effect transistors; radiation hardening (electronics); semiconductor device testing; BiCMOS technology; CMOS transistor; JFET; bipolar transistor; high temperature irradiation; ionizing dose; isochronal annealing; qualification; radiation hardness assurance testing; Annealing; BiCMOS integrated circuits; Bipolar transistors; Degradation; MOS devices; Performance evaluation; Qualifications; Space technology; Temperature dependence; Testing;
Conference_Titel :
Radiation and Its Effects on Components and Systems, 1997. RADECS 97. Fourth European Conference on
Conference_Location :
Cannes
Print_ISBN :
0-7803-4071-X
DOI :
10.1109/RADECS.1997.698888
