DocumentCode :
3260350
Title :
Internal parallelization of data-driven virtual hardware
Author :
Shibata, Yuichiro ; Ling, Xiao-Ping ; Amano, Hideharu
Author_Institution :
Keio Univ., Tokyo, Japan
fYear :
1999
fDate :
1999
Firstpage :
366
Lastpage :
371
Abstract :
WASMII and HOSMII are virtual hardware systems that execute dataflow algorithms on extended FPGAs with multiple sets of configuration RAM. Especially, HOSMII using an FPGA integrated with DRAM can effectively eliminate the overhead caused by replacement of configuration contexts. However, it has also been shown that the current HOSMII architecture cannot fully exploit the parallelism of an application. To get around this problem, internal parallelization of a HOSMII chip is discussed and evaluated through simulations
Keywords :
data flow computing; field programmable gate arrays; parallel architectures; parallel machines; virtual machines; DRAM; FPGA; HOSMII; WASMII; configuration RAM; data-driven virtual hardware; dataflow algorithms; internal parallelization; parallel architecture; simulations; Computational modeling; Computer architecture; Computer science; Concurrent computing; Field programmable gate arrays; Hardware; Parallel processing; Random access memory; Read-write memory; Registers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel Processing, 1999. Proceedings. 1999 International Workshops on
Conference_Location :
Aizu-Wakamatsu
ISSN :
1530-2016
Print_ISBN :
0-7695-0353-5
Type :
conf
DOI :
10.1109/ICPPW.1999.800087
Filename :
800087
Link To Document :
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