• DocumentCode
    3260494
  • Title

    FastPlace 2.0: an efficient analytical placer for mixed-mode designs

  • Author

    Viswanathan, Natarajan ; Pan, Min ; Chu, Chris

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Iowa State Univ., Ames, IA
  • fYear
    2006
  • fDate
    24-27 Jan. 2006
  • Abstract
    In this paper, we present FastPlace 2.0 - an extension to the efficient analytical standard-cell placer - FastPlace, to address the mixed-mode placement problem. The main contributions of our work are: (1) Extensions to the global placement framework of FastPlace to handle mixed-mode designs. (2) An efficient and optimal minimum perturbation macro legalization algorithm that is applied after global placement to resolve overlaps among the macros. (3) An efficient legalization scheme to legalize the standard cells among the placeable segments created after fixing the movable macros. On the ISPD 02 mixed-size placement benchmarks, our algorithm is 16.8times and 7.8times faster than state-of-the-art academic placers Capo 9.1 and Feng-shui 5.0 respectively. Correspondingly, we are on average, 12% and 3% better in terms of wirelength over the respective placers
  • Keywords
    circuit CAD; integrated circuit design; mixed analogue-digital integrated circuits; Capo 9.1 placer; FastPlace 2.0 placer; Feng-shui 5.0 placer; ISPD 02 mixed-size placement benchmarks; analytical standard-cell placer; global placement framework; mixed-mode designs; Algorithm design and analysis; Analytical models; Birth disorders; Clustering algorithms; Explosives; Partitioning algorithms; Runtime; Simulated annealing; Time to market; Timing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation, 2006. Asia and South Pacific Conference on
  • Conference_Location
    Yokohama
  • Print_ISBN
    0-7803-9451-8
  • Type

    conf

  • DOI
    10.1109/ASPDAC.2006.1594681
  • Filename
    1594681