Title :
COSIMA: a self-testable simulated annealing processor for universal cost functions
Author :
Eschermann, Bernhard ; Haberl, Oliver ; Bringmann, Oliver ; Seitz, Oliver
Author_Institution :
Inst. fur Rechnerentwurf und Fehlertoleranz, Karlsruhe, Univ., Germany
Abstract :
Presents a chip forming the heart of a special purpose coprocessing unit, which accelerates simulated annealing algorithms to solve combinatorial optimization problems. The chip includes about 26000 transistors and runs at an expected clock frequency of 20 MHz. Compared with a software solution it leads to a speedup of about 500
Keywords :
application specific integrated circuits; built-in self test; microprocessor chips; simulated annealing; 20 MHz; clock frequency; combinatorial optimization; self-testable simulated annealing processor; special purpose coprocessing unit; universal cost functions; Acceleration; Built-in self-test; Clocks; Computational modeling; Computer science; Cost function; Frequency; Hardware; Heart; Simulated annealing;
Conference_Titel :
Euro ASIC '92, Proceedings.
Conference_Location :
Paris
Print_ISBN :
0-8186-2845-6
DOI :
10.1109/EUASIC.1992.227998
