• DocumentCode
    3260897
  • Title

    P-buried region effects on breakdown voltage of NPT-TIGBT structure

  • Author

    Saenlamool, Montree ; Saejok, Karoon ; Trithaveesak, Opas ; Chaowicharat, Ekalak ; Hruanun, Charndet ; Poyai, Amporn

  • Author_Institution
    Thai Microelectron. Center (TMEC), Nat. Sci. & Technol. Dev. Agency (NSTDA), Chachoengsao, Thailand
  • fYear
    2011
  • fDate
    5-8 Dec. 2011
  • Firstpage
    385
  • Lastpage
    387
  • Abstract
    In this paper, we introduced a P-buried (Pb) layer under trench gate which relieved the electric field crowding in the Non Punch Through Trench gate Insulated Gate Bipolar Transistor (NPT-TIGBT) structure. The Pb layer, with carrier concentration of 5×1016 cm-3, was created underneath the trench gate within the n-drift layer. In this way, the concentration of electric field at the trench bottom corner decreased. As a result, the forward breakdown voltage characteristics of NPT-TIGBT improved. The structures were proposed and verified by T-CAD Sentuarus simulation. From the simulation results, the forward breakdown voltage increased by approximately 25% compared with conventional NPT-TIGBT. Furthermore, the forward current did not degrade the on-state voltage drop. In the experiments, the Pb layer was formed by boron implantation energies above 1 MeV with the Varian Genus 1520 High Energy Ion Implanter. The doping profiles were measured and analysed by SIMS.
  • Keywords
    electric breakdown; insulated gate bipolar transistors; power bipolar transistors; NPT-TIGBT structure; P-buried layer; P-buried region effects; SIMS; T-CAD Sentuarus simulation; boron implantation energy; breakdown voltage; doping profiles; electric field; forward breakdown voltage characteristics; forward current; n-drift layer; nonpunch through trench gate insulated gate bipolar transistor structure; on-state voltage drop; Boron; Breakdown voltage; Electric fields; Insulated gate bipolar transistors; Lead; Logic gates; Power semiconductor devices; Boron implantation; Breakdown voltage; Electric field crowding; Insulated gate bipolar transistor; NPT-TIGBT; P buries; Sentuarus simulation; T-CAD; Trench gate;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Power Electronics and Drive Systems (PEDS), 2011 IEEE Ninth International Conference on
  • Conference_Location
    Singapore
  • ISSN
    2164-5256
  • Print_ISBN
    978-1-61284-999-7
  • Electronic_ISBN
    2164-5256
  • Type

    conf

  • DOI
    10.1109/PEDS.2011.6147277
  • Filename
    6147277