DocumentCode
3260900
Title
Ping-pong supervisor for synchronous links
Author
Adde, P. ; Jézéquel, M.
Author_Institution
Lab. ´´Circuits Integres des Telecoms´´, Ecole Nat. Superieure des Telecommun. de Bretagne, Brest, France
fYear
1992
fDate
1-5 Jun 1992
Firstpage
364
Lastpage
367
Abstract
Describes the framework and the design method used for an integrated circuit achieving ping-pong control for digital synchronous links. The principles of time division duplex communications and the different choices required for circuit design are also explained
Keywords
digital communication systems; synchronous digital hierarchy; time division multiplexing; circuit design; digital synchronous links; ping-pong control; synchronous links; time division duplex communications; Circuit synthesis; Communication system control; Design methodology; Digital communication; Digital control; Frequency; Telephony; Time division multiplexing; Transceivers; VHF circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Euro ASIC '92, Proceedings.
Conference_Location
Paris
Print_ISBN
0-8186-2845-6
Type
conf
DOI
10.1109/EUASIC.1992.228000
Filename
228000
Link To Document