• DocumentCode
    3260951
  • Title

    An O(mn) time algorithm for optimal buffer insertion of nets with m sinks

  • Author

    Li, Zhuo ; Shi, Weiping

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Texas A&M Univ., College Station, TX
  • fYear
    2006
  • fDate
    24-27 Jan. 2006
  • Abstract
    Buffer insertion is an effective technique to reduce interconnect delay. In this paper, we give a simple O(mn) time algorithm for optimal buffer insertion, where m is the number of sinks and n is the number of buffer positions. This is the first linear time buffer insertion algorithm for nets with constant number of sinks. When m is small, it is a significant improvement over our recent O(nlog2n) time algorithm, and the O(n2) time algorithm of van Ginneken. For b buffer types, the new algorithm runs in O(b2n + bmn) time, an improvement of our recent O(bn2) algorithm. The improvement is made possible by a clever bookkeeping method and an innovative linked list data structure that can perform addition of a wire, and addition of a buffer in amortized O(1) time. On industrial test cases, the new algorithm is faster than previous best algorithms by an order of magnitude
  • Keywords
    buffer circuits; integrated circuit interconnections; interconnect delay reduction; linear time buffer insertion; linked list data structure; optimal buffer insertion; Data structures; Delay effects; Design automation; Design optimization; Dynamic programming; Libraries; Repeaters; Testing; Timing; Wire;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation, 2006. Asia and South Pacific Conference on
  • Conference_Location
    Yokohama
  • Print_ISBN
    0-7803-9451-8
  • Type

    conf

  • DOI
    10.1109/ASPDAC.2006.1594702
  • Filename
    1594702