DocumentCode :
3261279
Title :
Basic design techniques for both low-power and high-speed ASICs
Author :
Piguet, C. ; von Kaenol, V. ; Masgonty, J.-M. ; Perotto, J.-F. ; Klootsema, R.
fYear :
1992
fDate :
1-5 Jun 1992
Firstpage :
220
Lastpage :
225
Abstract :
The authors present several basic techniques to design low-power and high-speed ASIC´s. They are based on the need to design as simple circuits as possible. The same techniques are therefore capable of providing high-speed chips and low-power chips for portable electronics or DSP applications. The topics covered include: architectures of RISC, parallel and multitask type; layout techniques; schematic optimisation; and branch-based layout
Keywords :
application specific integrated circuits; circuit CAD; circuit layout CAD; digital integrated circuits; integrated circuit technology; integrated logic circuits; logic CAD; microprocessor chips; parallel architectures; reduced instruction set computing; ASIC; DSP applications; branch-based layout; design techniques; high-speed chips; low-power chips; multitask type; portable electronics; schematic optimisation; Application specific integrated circuits; Capacitance; Consumer electronics; Delay; Energy consumption; Frequency; Logic circuits; Logic design; Logic gates; Power supplies;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Euro ASIC '92, Proceedings.
Conference_Location :
Paris
Print_ISBN :
0-8186-2845-6
Type :
conf
DOI :
10.1109/EUASIC.1992.228021
Filename :
228021
Link To Document :
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