DocumentCode

3261376

Title

Area-efficient VDD-to-vSS ESD Clamp Circuit By Using Substrate-triggering Field-oxide Device (STFFOD) For Whole-chip ESD Protection

Author

Ker, Ming-Dou

fYear

1997

fDate

3-5 June 1997

Firstpage

69

Lastpage

73

Keywords

CMOS technology; Circuit testing; Clamps; Electrostatic discharge; Integrated circuit testing; MOS devices; Pins; Protection; Variable structure systems; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Technology, Systems, and Applications, 1997. Proceedings of Technical Papers. 1997 International Symposium on

Conference_Location

Taipei, Taiwan

ISSN

1524-766X

Print_ISBN

0-7803-4131-7

Type

conf

DOI

10.1109/VTSA.1997.614730

Filename

614730