Integrating ASIC and board design-for-testability

The author presents the knowledge-based system WAGNER that integrates the application of design-for-test ability methods for boards, ASICs and boards containing ASICs. The system adapts the design to testing by using expert DFT knowledge and heuristics stored in a rule-based called TRISTAN and ISOLDE. TRISTAN (TRI-Stage Testability ANalysis) qualitatively analyzes the testability of a circuit uniformly over the complete design hierarchy. It recognizes three design levels, i.e. the functional level, called block level, the RT or module level and the logic level. ISOLDE (Intelligent Synthesis Of testabLe DEsigns) synthesizes testability features on the basis of TRISTAN´s analysis results at each design level, selecting the most appropriate feature. A prototype implementation of the system in PROLOG has been evaluated for several designs, showing the approach is feasible for automated testable design