Title :
ASIC design using VLSI technology CAD tools: an optimal edge detector circuit
Author :
Zarka, Nizar ; Akil, Mohamed
Author_Institution :
Groupe ESIEE Lab. IAAI, Noisy-le-Grand, France
Abstract :
Presents the design of an integrated circuit, with a pipeline architecture, supporting programmable recursive filters intended for optimal edge detection of 2D images. The circuit is designed and simulated in 1.5 μ CMOS technology using microelectronics computer aided design: COMPASS. This CAD contains all necessary tools (datapath library, timing verification, chip compiler. . .) for a successful design. This circuit can process up to 1024×1024 8-bit images at a 20 MHz pixel frequency
Keywords :
CMOS integrated circuits; application specific integrated circuits; circuit layout CAD; digital filters; edge detection; image processing equipment; pipeline processing; 1.5 micron; 1024 pixels; 1048576 pixels; 20 MHz; 2D images; 8-bit images; ASIC design; CAD system; CMOS; COMPASS; VLSI technology CAD tools; chip compiler; datapath library; microelectronics computer aided design; optimal edge detection; optimal edge detector circuit; pipeline architecture; pixel frequency; programmable recursive filters; timing verification; Application specific integrated circuits; CMOS technology; Circuit simulation; Computational modeling; Design automation; Filters; Image edge detection; Integrated circuit technology; Pipelines; Very large scale integration;
Conference_Titel :
Euro ASIC '92, Proceedings.
Conference_Location :
Paris
Print_ISBN :
0-8186-2845-6
DOI :
10.1109/EUASIC.1992.228041
