Title :
Design technology for systems on a chip
Abstract :
As ASIC designs make the transition to systems on a chip (SoC), designers wrestle with increased complexity, escalating development costs and accelerating design cycles. In addition, advancing technology is exacerbating formerly parasitic effects such as RC delay and capacitive coupling into first-order effects. Complex designs and advancing technology may be the cause of these problems, but new design technology will help address these challenges. This presentation gives a perspective on the new design technology being deployed in the near future, which will profoundly affect the way in which designs are produced.
Keywords :
application specific integrated circuits; circuit CAD; circuit complexity; integrated circuit design; integrated circuit technology; product development; ASIC design; IC technology; RC delay; SoC; capacitive coupling; design complexity; design cycles; design technology; development costs; first-order effects; parasitic effects exacerbation; system on a chip; Acceleration; Delay; Electronic design automation and methodology; Hardware; Integrated circuit interconnections; Libraries; Logic design; System-level design; System-on-a-chip; Timing;
Conference_Titel :
VLSI Technology, 2001. Digest of Technical Papers. 2001 Symposium on
Conference_Location :
Kyoto, Japan
Print_ISBN :
4-89114-012-7
DOI :
10.1109/VLSIT.2001.934919
