DocumentCode
3261702
Title
PowerViP: SoC power estimation framework at transaction level
Author
Lee, Ikhwan ; Kim, Hyunsuk ; Yang, Peng ; Yoo, Sungjoo ; Chung, Eui-Young ; Choi, Kyu-Myung ; Kong, Jeong-Taek ; Eo, Soo-Kwan
Author_Institution
Syst. LSI Div., Samsung Electron., Co. Ltd., Gyeonggo-Do
fYear
2006
fDate
24-27 Jan. 2006
Abstract
In this work, we propose a SoC power estimation framework built on our system-level simulation environment. Our framework provides designers with the system-level power profile in a cycle-accurate manner. We target the framework to run fast and accurately, which is enabled by adopting different modeling techniques depending on the power characteristics of various IP blocks. The framework can be applied to any target SoC design
Keywords
circuit simulation; integrated circuit design; integrated circuit modelling; system-on-chip; IP blocks; PowerViP framework; SoC power estimation; power characteristics; system-level power profile; system-level simulation; Boosting; Energy consumption; Fabrics; Power generation; Power system modeling; Random access memory; Space exploration; System-level design; System-on-a-chip; Video codecs;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation, 2006. Asia and South Pacific Conference on
Conference_Location
Yokohama
Print_ISBN
0-7803-9451-8
Type
conf
DOI
10.1109/ASPDAC.2006.1594743
Filename
1594743
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