DocumentCode
3261786
Title
High-quality ultra-thin HfO/sub 2/ gate dielectric MOSFETs with TaN electrode and nitridation surface preparation
Author
Rino Choi ; Chang Seok Kang ; Byoung Hun Lee ; Onishi, K. ; Nieh, R. ; Gopalan, S. ; Dharmarajan, E. ; Lee, J.C.
Author_Institution
Microelectron. Res. Center, Texas Univ., Austin, TX, USA
fYear
2001
fDate
12-14 June 2001
Firstpage
15
Lastpage
16
Abstract
A surface preparation technique using an NH/sub 3/ anneal has been investigated to reduce interface reaction and consequently the equivalent oxide thickness (EOT) of hafnium oxide for alternative gate dielectric applications. MOSCAPs and MOSFETs were fabricated on the NH/sub 3/ nitrided substrates with HfO/sub 2/ dielectric and TaN gate electrode. Using this nitridation technique, EOT of as thin as 7.1 /spl Aring/ with 10/sup -2/ A/cm/sup 2/ at -1.5 V was obtained. Furthermore, excellent device characteristics and reasonable reliability have been achieved.
Keywords
MOS capacitors; MOSFET; annealing; dielectric thin films; electrodes; hafnium compounds; nitridation; permittivity; semiconductor device reliability; tantalum compounds; -1.5 V; 7.1 angstrom; HfO/sub 2/ dielectric; HfO/sub 2/-Si; MOSCAPs; MOSFETs; NH/sub 3/; NH/sub 3/ anneal; NH/sub 3/ nitrided substrates; TaN; TaN electrode; TaN gate electrode; device characteristics; equivalent oxide thickness; gate dielectric applications; hafnium oxide; interface reaction; nitridation surface preparation; nitridation technique; quality; reliability; surface preparation technique; ultra-thin HfO/sub 2/ gate dielectric MOSFETs; Annealing; Capacitance; Dielectric substrates; Electrodes; Hafnium oxide; Leakage current; MOSFETs; Nitrogen; Temperature; Thermal stability;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, 2001. Digest of Technical Papers. 2001 Symposium on
Conference_Location
Kyoto, Japan
Print_ISBN
4-89114-012-7
Type
conf
DOI
10.1109/VLSIT.2001.934924
Filename
934924
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